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SimonLuk-6407 avatar image
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SimonLuk-6407 asked 75787322 answered

Question about LevelX source code in file lx_nand_flash_open.c.

LevelX version 6.1.3

could not understand file lx_nand_flash_open.c, between line 282 to 297

why do the _lx_nand_flash_driver_write() twice?


 /* Setup the initial erase count to 1.  */
 page_word_ptr[0] =  (((ULONG) 1) | LX_BLOCK_ERASED);
    
 /* Write the initial erase count for the block.  */            
 status =  _lx_nand_flash_driver_write(nand_flash, block, 0, page_word_ptr, LX_NAND_ERASE_COUNT_WRITE_SIZE);
    
 /* Check for status after the block erase.  */
 if (status == LX_SUCCESS)
 {
    
     /* Setup the initial erase count to 1.  */
     page_word_ptr[0] =  ((ULONG) 1);
    
     /* Write the initial erase count for the block.  */            
     status =  _lx_nand_flash_driver_write(nand_flash, block, 0, page_word_ptr, LX_NAND_ERASE_COUNT_WRITE_SIZE);
 }
azure-rtos
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ScottAzureRTOS avatar image
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ScottAzureRTOS answered

Hello @SimonLuk-6407 - The first write sets the initial erase count to 1, but also maintains the erased bit – bit 31. The next write clears the erased bit and maintains the new erase count of 1. The LevelX code generally prefers to manipulate each field in discrete steps.

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75787322 avatar image
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75787322 answered


this operation will cause problems in NAND ECC calculation. ECC code will be stored in the first write, and problems will occur in the second write,then LevelX only use for
none ECC case?

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