ld_uav_typed (sm5 - asm)
Random-access read of an element from a typed unordered access view (UAV).
|ld_uav_typed dst0[.mask], srcAddress[.swizzle], srcUAV[.swizzle]|
||[in] The address of the results of the operation.
||[in] Specifies the address to read from.
||[in] The source to read from.
This instruction performs a 4-component element read from srcUAV at the unsigned integer address in srcAddress, converted to 32bit per component based on the format, then written to dst0 in the shader.
srcUAV is a UAV (u#) declared as typed. However, the type of the bound resource must be R32_UINT/SINT/FLOAT.
The number of 32-bit unsigned integer components taken from the address are determined by the dimensionality of the resource declared at srcUAV. Addressing is the same as the ld instruction.
Out of bounds addressing is the same as the ld instruction.
The behavior of this instruction is identical to the ld instruction if called as ld dst0[.mask], srcAddress[.swizzle], srcUAV[.swizzle]
It is invalid and undefined to use this instruction on a UAV that is not declared as typed. Doing this on a structured or typeless UAV is invalid.
This instruction applies to the following shader stages:
Because UAVs are available at all shader stages for Direct3D 11.1, this instruction applies to all shader stages for the Direct3D 11.1 runtime, which is available starting with Windows 8.
Minimum Shader Model
This instruction is supported in the following shader models:
|Shader Model 5||yes|
|Shader Model 4.1||no|
|Shader Model 4||no|
|Shader Model 3 (DirectX HLSL)||no|
|Shader Model 2 (DirectX HLSL)||no|
|Shader Model 1 (DirectX HLSL)||no|
cs_4_0 and cs_4_1 support this instruction for UAV, SRV and TGSM.