Cache Support for Streaming SIMD Extensions 2 Floating-Point Operations
For an explanation of the syntax used in code samples in this topic, see Floating-Point Intrinsics Using Streaming SIMD Extensions.
SSE2 intrinsics use the __m128, __m128i, and __m128d data types, which are not supported on Itanium Processor Family (IPF) processors. Any SSE2 intrinsics that use the __m64 data type are not supported on x64 processors.
The emmintrin.h header file contains the declarations for the SSE2 instructions intrinsics.
void _mm_stream_pd (double *p, __m128d a);
Stores the data in a to the address p without polluting caches. The address p must be 16-byte aligned. If the cache line containing address p is already in the cache, the cache will be updated.
p := a0 p := a1