Address Enum
Definition
Important
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Control Register Summary.
public enum Address
type Address =
Public Enum Address
- Inheritance
-
Address
Fields
BfpCtrl | 12 | RxnBF Pin Control and Status Register. |
CanCtrl | 15 | CAN Control Register. |
CanIntE | 43 | CAN Interrupt Enable Register. |
CanIntF | 44 | CAN Interrupt Flag Register. |
CanStat | 14 | CAN Status Register. |
Cnf1 | 42 | Configuration 1 Register. |
Cnf2 | 41 | Configuration 2 Register. |
Cnf3 | 40 | Configuration 3 Register. |
Eflg | 45 | Error Flag Register. |
Rec | 29 | Receiver Error Counter Register. |
RxB0Ctrl | 96 | Receive Buffer 0 Control Register. |
RxB0D0 | 102 | Receive Buffer 0 Data Byte 0 Register. |
RxB0D1 | 103 | Receive Buffer 0 Data Byte 1 Register. |
RxB0D2 | 104 | Receive Buffer 0 Data Byte 2 Register. |
RxB0D3 | 105 | Receive Buffer 0 Data Byte 3 Register. |
RxB0D4 | 106 | Receive Buffer 0 Data Byte 4 Register. |
RxB0D5 | 107 | Receive Buffer 0 Data Byte 5 Register. |
RxB0D6 | 108 | Receive Buffer 0 Data Byte 6 Register. |
RxB0D7 | 109 | Receive Buffer 0 Data Byte 7 Register. |
RxB0Dlc | 101 | Receive Buffer 0 Data Length Code Register. |
RxB0Eid0 | 100 | Receive Buffer 0 Extended Identifier Low Register. |
RxB0Eid8 | 99 | Receive Buffer 0 Extended Identifier High Register. |
RxB0Sidh | 97 | Receive Buffer 0 Standard Identifier High Register. |
RxB0Sidl | 98 | Receive Buffer 0 Standard Identifier Low Register. |
RxB1Ctrl | 112 | Receive Buffer 1 Control Register. |
RxB1D0 | 118 | Receive Buffer 1 Data Byte 0 Register. |
RxB1D1 | 119 | Receive Buffer 1 Data Byte 1 Register. |
RxB1D2 | 120 | Receive Buffer 1 Data Byte 2 Register. |
RxB1D3 | 121 | Receive Buffer 1 Data Byte 3 Register. |
RxB1D4 | 122 | Receive Buffer 1 Data Byte 4 Register. |
RxB1D5 | 123 | Receive Buffer 1 Data Byte 5 Register. |
RxB1D6 | 124 | Receive Buffer 1 Data Byte 6 Register. |
RxB1D7 | 125 | Receive Buffer 1 Data Byte 7 Register. |
RxB1Dlc | 117 | Receive Buffer 1 Data Length Code Register. |
RxB1Eid0 | 116 | Receive Buffer 1 Extended Identifier Low Register. |
RxB1Eid8 | 115 | Receive Buffer 1 Extended Identifier High Register. |
RxB1Sidh | 113 | Receive Buffer 1 Standard Identifier High Register. |
RxB1Sidl | 114 | Receive Buffer 1 Standard Identifier Low Register. |
RxF0Eid0 | 3 | Filter 0 Extended Identifier Low Register. |
RxF0Eid8 | 2 | Filter 0 Extended Identifier High Register. |
RxF0Sidh | 0 | Filter 0 Standard Identifier High Register. |
RxF0Sidl | 1 | Filter 0 Standard Identifier Low Register. |
RxF1Eid0 | 7 | Filter 1 Extended Identifier Low Register. |
RxF1Eid8 | 6 | Filter 1 Extended Identifier High Register. |
RxF1Sidh | 4 | Filter 1 Standard Identifier High Register. |
RxF1Sidl | 5 | Filter 1 Standard Identifier Low Register. |
RxF2Eid0 | 11 | Filter 2 Extended Identifier Low Register. |
RxF2Eid8 | 10 | Filter 2 Extended Identifier High Register. |
RxF2Sidh | 8 | Filter 2 Standard Identifier High Register. |
RxF2Sidl | 9 | Filter 2 Standard Identifier Low Register. |
RxF3Eid0 | 19 | Filter 3 Extended Identifier Low Register. |
RxF3Eid8 | 18 | Filter 3 Extended Identifier High Register. |
RxF3Sidh | 16 | Filter 3 Standard Identifier High Register. |
RxF3Sidl | 17 | Filter 3 Standard Identifier Low Register. |
RxF4Eid0 | 23 | Filter 4 Extended Identifier Low Register. |
RxF4Eid8 | 22 | Filter 4 Extended Identifier High Register. |
RxF4Sidh | 20 | Filter 4 Standard Identifier High Register. |
RxF4Sidl | 21 | Filter 4 Standard Identifier Low Register. |
RxF5Eid0 | 27 | Filter 5 Extended Identifier Low Register. |
RxF5Eid8 | 26 | Filter 5 Extended Identifier High Register. |
RxF5Sidh | 24 | Filter 5 Standard Identifier High Register. |
RxF5Sidl | 25 | Filter 5 Standard Identifier Low Register. |
RxM0Eid0 | 35 | Mask 0 Extended Identifier Low Register. |
RxM0Eid8 | 34 | Mask 0 Extended Identifier High Register. |
RxM0Sidh | 32 | Mask 0 Standard Identifier High Register. |
RxM0Sidl | 33 | Mask 0 Standard Identifier Low Register. |
RxM1Eid0 | 39 | Mask 1 Extended Identifier Low Register. |
RxM1Eid8 | 38 | Mask 1 Extended Identifier High Register. |
RxM1Sidh | 36 | Mask 1 Standard Identifier High Register. |
RxM1Sidl | 37 | Mask 1 Standard Identifier Low Register. |
Tec | 28 | Transmit Error Counter Register. |
TxB0Ctrl | 48 | Transmit Buffer 0 Control Register. |
TxB0D0 | 54 | Transmit Buffer 0 Data Byte 0 Register. |
TxB0D1 | 55 | Transmit Buffer 0 Data Byte 1 Register. |
TxB0D2 | 56 | Transmit Buffer 0 Data Byte 2 Register. |
TxB0D3 | 57 | Transmit Buffer 0 Data Byte 3 Register. |
TxB0D4 | 58 | Transmit Buffer 0 Data Byte 4 Register. |
TxB0D5 | 59 | Transmit Buffer 0 Data Byte 5 Register. |
TxB0D6 | 60 | Transmit Buffer 0 Data Byte 6 Register. |
TxB0D7 | 61 | Transmit Buffer 0 Data Byte 7 Register. |
TxB0Dlc | 53 | Transmit Buffer 0 Data Length Code Register. |
TxB0Eid0 | 52 | Transmit Buffer 0 Extended Identifier Low Register. |
TxB0Eid8 | 51 | Transmit Buffer 0 Extended Identifier High Register. |
TxB0Sidh | 49 | Transmit Buffer 0 Standard Identifier High Register. |
TxB0Sidl | 50 | Transmit Buffer 0 Standard Identifier Low Register. |
TxB1Ctrl | 64 | Transmit Buffer 1 Control Register. |
TxB1D0 | 70 | Transmit Buffer 1 Data Byte 0 Register. |
TxB1D1 | 71 | Transmit Buffer 1 Data Byte 1 Register. |
TxB1D2 | 72 | Transmit Buffer 1 Data Byte 2 Register. |
TxB1D3 | 73 | Transmit Buffer 1 Data Byte 3 Register. |
TxB1D4 | 74 | Transmit Buffer 1 Data Byte 4 Register. |
TxB1D5 | 75 | Transmit Buffer 1 Data Byte 5 Register. |
TxB1D6 | 76 | Transmit Buffer 1 Data Byte 6 Register. |
TxB1D7 | 77 | Transmit Buffer 1 Data Byte 7 Register. |
TxB1Dlc | 69 | Transmit Buffer 1 Data Length Code Register. |
TxB1Eid0 | 68 | Transmit Buffer 1 Extended Identifier Low Register. |
TxB1Eid8 | 67 | Transmit Buffer 1 Extended Identifier High Register. |
TxB1Sidh | 65 | Transmit Buffer 1 Standard Identifier High Register. |
TxB1Sidl | 66 | Transmit Buffer 1 Standard Identifier Low Register. |
TxB2Ctrl | 80 | Transmit Buffer 2 Control Register. |
TxB2D0 | 86 | Transmit Buffer 2 Data Byte 0 Register. |
TxB2D1 | 87 | Transmit Buffer 2 Data Byte 1 Register. |
TxB2D2 | 88 | Transmit Buffer 2 Data Byte 2 Register. |
TxB2D3 | 89 | Transmit Buffer 2 Data Byte 3 Register. |
TxB2D4 | 90 | Transmit Buffer 2 Data Byte 4 Register. |
TxB2D5 | 91 | Transmit Buffer 2 Data Byte 5 Register. |
TxB2D6 | 92 | Transmit Buffer 2 Data Byte 6 Register. |
TxB2D7 | 93 | Transmit Buffer 2 Data Byte 7 Register. |
TxB2Dlc | 85 | Transmit Buffer 2 Data Length Code Register. |
TxB2Eid0 | 84 | Transmit Buffer 2 Extended Identifier Low Register. |
TxB2Eid8 | 83 | Transmit Buffer 2 Extended Identifier High Register. |
TxB2Sidh | 81 | Transmit Buffer 2 Standard Identifier High Register. |
TxB2Sidl | 82 | Transmit Buffer 2 Standard Identifier Low Register. |
TxRtsCtrl | 13 | TxnRTS Pin Control and Status Register. |
Applies to
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