Static configuration options for heterogeneous power scheduling overview

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You can use the static configuration options documented in this section to tune the core parking engine on heterogeneous systems.

Note  These settings are only valid for class 1 cores and replace CP_CONCURRENCY, PARK_DISTRIBUTION_THRESHOLD and CP_HEADROOM.

In this section

Topic Description

HeteroIncreaseThreshold

HeteroIncreaseThreshold specifies the threshold value to cross above, which is required to unpark the Nth efficiency class 1 core. There is a separate value for each core index. The threshold is relative to efficiency class 0 performance.

HeteroDecreaseThreshold

HeteroDecreaseThreshold specifies a threshold to cross below, which is required to park the Nth efficiency class 1 core. There is a separate value for each core index. The threshold is relative to efficiency class 0 performance.

HeteroIncreaseTime

HeteroIncreaseTime specifies the minimum amount of time that must elapse before additional efficiency class 1 logical processors can be transitioned form the parked state to the unparked state. The time is specified in processor performance time check intervals.

HeteroDecreaseTime

HeteroDecreaseTime specifies the minimum amount of time that must elapse before additional efficiency class 1 logical processors can be transitioned from the unparked state to the parked state. The time is specified in performance time check intervals.

HeteroClass1InitialPerf

HeteroClass1InitialPerf specifies the initial performance percentage of the efficiency class 1 core when this core is unparked.

HeteroClass0FloorPerf

HeteroClass0FloorPerf specifies the performance level floor, in percentage, to use for efficiency class 0 processors if there is at least one unparked efficiency class 1 processor.

SchedulingPolicy

SchedulingPolicy specifies the preference (or constraint) in processor scheduling on systems with processors with heterogeneous architecture.

ShortSchedulingPolicy

ShortSchedulingPolicy specifies the preference (or constraint) in processor scheduling for short running threads on systems with processors with heterogeneous architecture.