DXGKARGCB_NOTIFY_INTERRUPT_DATA structure

The DXGKARGCB_NOTIFY_INTERRUPT_DATA structure describes notification information.

Syntax

typedef struct _DXGKARGCB_NOTIFY_INTERRUPT_DATA {
  DXGK_INTERRUPT_TYPE                InterruptType;
  union {
    struct {
      UINT SubmissionFenceId;
      UINT NodeOrdinal;
      UINT EngineOrdinal;
    } DmaCompleted;
    struct {
      UINT PreemptionFenceId;
      UINT LastCompletedFenceId;
      UINT NodeOrdinal;
      UINT EngineOrdinal;
    } DmaPreempted;
    struct {
      UINT     FaultedFenceId;
      NTSTATUS Status;
      UINT     NodeOrdinal;
      UINT     EngineOrdinal;
    } DmaFaulted;
    struct {
      D3DDDI_VIDEO_PRESENT_TARGET_ID VidPnTargetId;
      PHYSICAL_ADDRESS               PhysicalAddress;
      UINT                           PhysicalAdapterMask;
    } CrtcVsync;
#if (DXGKDDI_INTERFACE_VERSION >= DXGKDDI_INTERFACE_VERSION_WIN8)
    struct {
      D3DDDI_VIDEO_PRESENT_TARGET_ID VidPnTargetId;
    } DisplayOnlyVsync;
    struct {
      D3DDDI_VIDEO_PRESENT_TARGET_ID     VidPnTargetId;
      UINT                               PhysicalAdapterMask;
      UINT                               MultiPlaneOverlayVsyncInfoCount;
      DXGK_MULTIPLANE_OVERLAY_VSYNC_INFO *pMultiPlaneOverlayVsyncInfo;
    } CrtcVsyncWithMultiPlaneOverlay;
    DXGKARGCB_PRESENT_DISPLAYONLY_PROGRESS DisplayOnlyPresentProgress;
#endif

    struct {
      UINT Reserved[16];
    } Reserved;
  };
  DXGKCB_NOTIFY_INTERRUPT_DATA_FLAGS Flags;
} DXGKARGCB_NOTIFY_INTERRUPT_DATA;

Members

InterruptType

[in] A DXGK_INTERRUPT_TYPE-typed value that indicates the type of interrupt that the display miniport driver notifies the GPU scheduler about.

__unnamed_union_0bf1_26

__unnamed_union_0bf1_26.DmaCompleted

__unnamed_union_0bf1_26.DmaCompleted.SubmissionFenceId

__unnamed_union_0bf1_26.DmaCompleted.NodeOrdinal

__unnamed_union_0bf1_26.DmaCompleted.EngineOrdinal

__unnamed_union_0bf1_26.DmaPreempted

__unnamed_union_0bf1_26.DmaPreempted.PreemptionFenceId

__unnamed_union_0bf1_26.DmaPreempted.LastCompletedFenceId

__unnamed_union_0bf1_26.DmaPreempted.NodeOrdinal

__unnamed_union_0bf1_26.DmaPreempted.EngineOrdinal

__unnamed_union_0bf1_26.DmaFaulted

__unnamed_union_0bf1_26.DmaFaulted.FaultedFenceId

__unnamed_union_0bf1_26.DmaFaulted.Status

__unnamed_union_0bf1_26.DmaFaulted.NodeOrdinal

__unnamed_union_0bf1_26.DmaFaulted.EngineOrdinal

__unnamed_union_0bf1_26.CrtcVsync

__unnamed_union_0bf1_26.CrtcVsync.VidPnTargetId

__unnamed_union_0bf1_26.CrtcVsync.PhysicalAddress

__unnamed_union_0bf1_26.CrtcVsync.PhysicalAdapterMask

__unnamed_union_0bf1_26.DisplayOnlyVsync

__unnamed_union_0bf1_26.DisplayOnlyVsync.VidPnTargetId

__unnamed_union_0bf1_26.CrtcVsyncWithMultiPlaneOverlay

__unnamed_union_0bf1_26.CrtcVsyncWithMultiPlaneOverlay.VidPnTargetId

__unnamed_union_0bf1_26.CrtcVsyncWithMultiPlaneOverlay.PhysicalAdapterMask

__unnamed_union_0bf1_26.CrtcVsyncWithMultiPlaneOverlay.MultiPlaneOverlayVsyncInfoCount

__unnamed_union_0bf1_26.CrtcVsyncWithMultiPlaneOverlay.pMultiPlaneOverlayVsyncInfo

__unnamed_union_0bf1_26.DisplayOnlyPresentProgress

__unnamed_union_0bf1_26.MiracastEncodeChunkCompleted

__unnamed_union_0bf1_26.MiracastEncodeChunkCompleted.VidPnTargetId

__unnamed_union_0bf1_26.MiracastEncodeChunkCompleted.ChunkInfo

__unnamed_union_0bf1_26.MiracastEncodeChunkCompleted.pPrivateDriverData

__unnamed_union_0bf1_26.MiracastEncodeChunkCompleted.PrivateDataDriverSize

__unnamed_union_0bf1_26.MiracastEncodeChunkCompleted.Status

__unnamed_union_0bf1_26.DmaPageFaulted

__unnamed_union_0bf1_26.DmaPageFaulted.FaultedFenceId

__unnamed_union_0bf1_26.DmaPageFaulted.FaultedPrimitiveAPISequenceNumber

__unnamed_union_0bf1_26.DmaPageFaulted.FaultedPipelineStage

__unnamed_union_0bf1_26.DmaPageFaulted.FaultedBindTableEntry

__unnamed_union_0bf1_26.DmaPageFaulted.PageFaultFlags

__unnamed_union_0bf1_26.DmaPageFaulted.FaultedVirtualAddress

__unnamed_union_0bf1_26.DmaPageFaulted.NodeOrdinal

__unnamed_union_0bf1_26.DmaPageFaulted.EngineOrdinal

__unnamed_union_0bf1_26.DmaPageFaulted.PageTableLevel

__unnamed_union_0bf1_26.DmaPageFaulted.FaultErrorCode

__unnamed_union_0bf1_26.DmaPageFaulted.FaultedProcessHandle

__unnamed_union_0bf1_26.CrtcVsyncWithMultiPlaneOverlay2

__unnamed_union_0bf1_26.CrtcVsyncWithMultiPlaneOverlay2.VidPnTargetId

__unnamed_union_0bf1_26.CrtcVsyncWithMultiPlaneOverlay2.PhysicalAdapterMask

__unnamed_union_0bf1_26.CrtcVsyncWithMultiPlaneOverlay2.MultiPlaneOverlayVsyncInfoCount

__unnamed_union_0bf1_26.CrtcVsyncWithMultiPlaneOverlay2.pMultiPlaneOverlayVsyncInfo

__unnamed_union_0bf1_26.CrtcVsyncWithMultiPlaneOverlay2.GpuFrequency

__unnamed_union_0bf1_26.CrtcVsyncWithMultiPlaneOverlay2.GpuClockCounter

__unnamed_union_0bf1_26.MonitoredFenceSignaled

__unnamed_union_0bf1_26.MonitoredFenceSignaled.NodeOrdinal

__unnamed_union_0bf1_26.MonitoredFenceSignaled.EngineOrdinal

__unnamed_union_0bf1_26.HwContextListSwitchCompleted

__unnamed_union_0bf1_26.HwContextListSwitchCompleted.NodeOrdinal

__unnamed_union_0bf1_26.HwContextListSwitchCompleted.EngineOrdinal

__unnamed_union_0bf1_26.HwContextListSwitchCompleted.ContextSwitchFence

__unnamed_union_0bf1_26.HwQueuePageFaulted

__unnamed_union_0bf1_26.HwQueuePageFaulted.FaultedFenceId

__unnamed_union_0bf1_26.HwQueuePageFaulted.FaultedVirtualAddress

__unnamed_union_0bf1_26.HwQueuePageFaulted.FaultedPrimitiveAPISequenceNumber

__unnamed_union_0bf1_26.HwQueuePageFaulted.__unnamed_union_0bf1_39

__unnamed_union_0bf1_26.HwQueuePageFaulted.__unnamed_union_0bf1_39.FaultedHwQueue

__unnamed_union_0bf1_26.HwQueuePageFaulted.__unnamed_union_0bf1_39.FaultedHwContext

__unnamed_union_0bf1_26.HwQueuePageFaulted.__unnamed_union_0bf1_39.FaultedProcessHandle

__unnamed_union_0bf1_26.HwQueuePageFaulted.NodeOrdinal

__unnamed_union_0bf1_26.HwQueuePageFaulted.EngineOrdinal

__unnamed_union_0bf1_26.HwQueuePageFaulted.FaultedPipelineStage

__unnamed_union_0bf1_26.HwQueuePageFaulted.FaultedBindTableEntry

__unnamed_union_0bf1_26.HwQueuePageFaulted.PageFaultFlags

__unnamed_union_0bf1_26.HwQueuePageFaulted.PageTableLevel

__unnamed_union_0bf1_26.HwQueuePageFaulted.FaultErrorCode

__unnamed_union_0bf1_26.PeriodicMonitoredFenceSignaled

__unnamed_union_0bf1_26.PeriodicMonitoredFenceSignaled.VidPnTargetId

__unnamed_union_0bf1_26.PeriodicMonitoredFenceSignaled.NotificationID

__unnamed_union_0bf1_26.SchedulingLogInterrupt

__unnamed_union_0bf1_26.SchedulingLogInterrupt.NodeOrdinal

__unnamed_union_0bf1_26.SchedulingLogInterrupt.EngineOrdinal

__unnamed_union_0bf1_26.GpuEngineTimeout

__unnamed_union_0bf1_26.GpuEngineTimeout.NodeOrdinal

__unnamed_union_0bf1_26.GpuEngineTimeout.EngineOrdinal

__unnamed_union_0bf1_26.SuspendContextCompleted

__unnamed_union_0bf1_26.SuspendContextCompleted.hContext

__unnamed_union_0bf1_26.SuspendContextCompleted.ContextSuspendFence

__unnamed_union_0bf1_26.Reserved

__unnamed_union_0bf1_26.Reserved.Reserved

Flags

[in] A DXGKCB_NOTIFY_INTERRUPT_DATA_FLAGS structure that indicates if the display miniport driver provides a physical adapter mask in a call to the DxgkCbNotifyInterrupt function.

Remarks

Depending on the value in the InterruptType member, the display miniport driver should set the appropriate union member in the DXGKARGCB_NOTIFY_INTERRUPT_DATA structure. For example, for the end of a direct memory access (DMA) buffer fence, which corresponds to a value of DXGK_INTERRUPT_DMA_COMPLETED in InterruptType, the driver must set a value in the SubmissionFenceId member of the DmaCompleted member. This value should be the DMA buffer fence identifier, which the driver's DxgkDdiSubmitCommand function assigned to the just completed DMA buffer.

Requirements

   

See Also

DXGKARGCB_PRESENT_DISPLAYONLY_PROGRESS

DXGK_INTERRUPT_TYPE

DxgkDdiSubmitCommand

DxgkCbNotifyInterrupt

DXGK_MIRACAST_CAPS

DXGK_MULTIPLANE_OVERLAY_VSYNC_INFO

DXGKCB_NOTIFY_INTERRUPT_DATA_FLAGS

DXGK_PAGE_FAULT_FLAGS

DXGK_MIRACAST_CHUNK_INFO