Serial Port Console Redirection Table (SPCR)
This document defines the content of the Serial Port Console Redirection Table. This table is used to indicate whether a serial port or a non-legacy UART interface is available for use with Microsoft® Windows® Emergency Management Services (EMS).
The table provides information about the configuration and use of the serial port or non-legacy UART interface. On a system where the BIOS or system firmware uses the serial port for console input/output, this table should be used to convey information about the settings, to ensure a seamless transition between the firmware console output and Windows EMS output.
This table must be located in system memory with other ACPI tables, and it must be referenced in the ACPI RSDT table.
Patent Notice: Microsoft is making certain patent rights available for implementations of this specification under two options:
- Microsoft’s Community Promise, available at https://www.microsoft.com/openspecifications/en/us/programs/community-promise/default.aspx; or
- The Open Web Foundation Final Specification Agreement Version 1.0 ("OWF 1.0") as of October 1, 2012, available on the Open Web Foundation web site.
| Field | Byte Length | Byte Offset | Description |
|---|---|---|---|
| Header | |||
| Signature | 4 | 0 | 'SPCR'. Signature for the Serial Port Console Redirection Table. |
| Length | 4 | 4 | Length, in bytes, of the entire Serial Port Console Redirection Table. |
| Revision | 1 | 8 | The current table revision is 3. |
| Checksum | 1 | 9 | Entire table must sum to zero. |
| OEM ID | 6 | 10 | Original equipment manufacturer (OEM) ID. |
| OEM Table ID | 8 | 16 | For the Serial Port Console Redirection Table, the table ID is the manufacturer model ID. |
| OEM Revision | 4 | 24 | OEM revision of Serial Port Console Redirection Table for supplied OEM Table ID. |
| Creator ID | 4 | 28 | Vendor ID of utility that created the table. |
| Creator Revision | 4 | 32 | Revision of utility that created the table. |
| Interface Type | 1 | 36 | Indicates the type of the register interface: For Revision 1:
See the Serial Port Subtypes in Table 3 of the DBG2 Specification |
| Reserved | 3 | 37 | Must be 0. |
| Base Address | 12 | 40 | The base address of the Serial Port register set described using the ACPI Generic Address Structure, or 0 if console redirection is disabled. Note: COM1 (0x3F8) would be:
|
| Interrupt Type | 1 | 52 | Interrupt type(s) used by the UART:
|
| IRQ | 1 | 53 | The PC-AT-compatible IRQ used by the UART:
|
| Global System Interrupt | 4 | 54 | The Global System Interrupt (GSIV) used by the UART. Not valid if Bit[0] is the only bit set in the Interrupt Type field. |
| Baud Rate | 1 | 58 | The baud rate the BIOS used for redirection:
|
| Parity | 1 | 59 |
|
| Stop Bits | 1 | 60 |
|
| Flow Control | 1 | 61 |
|
| Terminal Type | 1 | 62 | The terminal protocol the BIOS was using for console redirection:
|
| Language | 1 | 63 | Language which the BIOS was redirecting. Must be 0. |
| PCI Device ID | 2 | 64 | Designates the Device ID of a PCI device that contains a UART to be used as a headless port. Must be 0xFFFF if it is not a PCI device. |
| PCI Vendor ID | 2 | 66 | Designates the Vendor ID of a PCI device that contains a UART to be used as a headless port. Must be 0xFFFF if it is not a PCI device. |
| PCI Bus Number | 1 | 68 | PCI Bus Number if table describes a PCI device. Must be 0x00 if it is not a PCI device. |
| PCI Device Number | 1 | 69 | PCI Device Number if table describes a PCI device. Must be 0x00 if it is not a PCI device. |
| PCI Function Number | 1 | 70 | PCI Function Number if table describes a PCI device. Must be 0x00 if it is not a PCI device. |
| PCI Flags | 4 | 71 | PCI Compatibility flags bitmask. Should be zero by default.
|
| PCI Segment | 1 | 75 | PCI segment number. For systems with fewer than 255 PCI buses, this number must be 0. |
| UART Clock Frequency | 4 | 76 | For Revision 2 or lower:
|
Revision History
| Date | Rev | Description |
|---|---|---|
| 2/15/00 | .10 | Created |
| 3/1/00 | .50 | ‘SPCR’. Signature Data added |
| 3/20/00 | .55 | Data revised to include port and irq |
| 3/22/00 | .56 | Clarified port identification Added ability to disable redirection. Added pointer to the Generic Register Address Structure |
| 3/23/00 | .56a | Formatting, disclaimer, copy editing |
| 4/24/00 | .6 | Posted on web for WinHEC |
| 4/24/00 | .6 | Public review draft published |
| 5/25/00 | .61 | Correction to BASE_ADDRESS description |
| 5/25/00 | .61 | Public review draft published |
| 5/31/00 | .7 | Correction to BASE_ADDRESS description examples. Added 16540 interface. |
| 5/31/00 | .71 | Changed the info on the GRAS from a note to a “*” |
| 5/31/00 | .71 | Public review draft published |
| 6/1/00 | .72 | Changed GRAS COM port examples to be little-endian. Added text to the end of the line |
| 7/12/00 | .75 | Fixed IRQ Description. Fixed various format issues Added PCI bus information. |
| 7/26/00 | .76 | Update to PCI field name “Device Number”. Changed intro language to include non-legacy UART. |
| 8/10/00 | .77 | Changed interrupt information, adding APIC and SAPIC Added flow control |
| 9/22/00 | .78 | Added PCI Segment |
| 10/25/00 | .80 | Fixed PCI Flags section. Added Terminal Types Added 16450 FCR info |
| 10/1/01 | .95 | Removed language codes |
| 1/11/02 | 1.00 | adding updated licensing spec to 1.00 |
| 3/12/14 | 1.01 | Released under Microsoft Community Promise |
| 6/2/14 | 1.02 | Changed Table Revision to 2 and added support for additional Interface Types, as defined in the DBG2 specification. |
| 8/10/15 | 1.03 | Updated patent notice. |
| 7/23/2018 | 1.04 | |
| 6/5/2020 | 1.05 | Edited formatting |
| 9/1/2020 | 1.06 | Edited formatting and updated link to DBG2 specification |
| 2/17/2021 | 1.07 | Fixed incorrect description in Stop Bits field. Undo accidental removal of Flow Control field. Edited formatting. |
| 10/7/2021 | 1.08 | Changed Table Revision to 3 and created field for UART Clock Frequency. Edited formatting. |
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