Windows Hardware Error Architecture Definitions
The following are definitions for terms related to the Windows Hardware Error Architecture (WHEA).
Advanced Configuration and Power Interface (ACPI)
An industry-standard interface for operating system-directed device configuration and power management. For more information about ACPI, see the ACPI Specification.
Corrected Machine Check (CMC)
An error condition detected by the processor that has been corrected by the hardware or the firmware. A CMC is typically reported to the operating system either by signaling an interrupt or by setting bits in an error register that is periodically polled by the operating system. This is a nonfatal error condition.
Corrected Platform Error (CPE)
An error condition detected by the platform hardware that has been corrected by the hardware or the firmware. A CPE is typically reported to the operating system either by signaling an interrupt or by setting bits in an error register that is periodically polled by the operating system. This is a nonfatal error condition.
Event Tracing for Windows (ETW)
ETW provides software developers the ability to start and stop event tracing sessions, instrument an application to provide trace events, and consume trace events. WHEA uses ETW to notify subscribers about the hardware error events and to record hardware error events in the system event log.
Extensible Firmware Interface (EFI)
The next-generation model for the interface between the operating system and the platform firmware. The interface consists of data tables that contain platform-related information, plus boot and runtime service calls that are available to the operating system and its loader. Together, these provide a standard environment for booting an operating system and running pre-boot applications. For more information about EFI, see the Unified Extensible Firmware Interface (UEFI) Specification.
Intelligent Platform Management Interface (IPMI)
An interface that is used to monitor and manage functionality, and that is built into the hardware platform. IPMI is primarily used to monitor the health of the system hardware and to handle environmental error conditions. For more information about IPMI, see the IPMI Specification.
Low Level Hardware Error Handler (LLHEH)
The first operating system code that runs in response to a hardware error condition. An LLHEH can be an interrupt handler, exception handler, polling routine, or a callback routine that is called by the system firmware. All LLHEHs report hardware errors to the operating system through a common hardware error reporting function.
Machine Specific Register (MSR)
A processor-specific register that is used by system software to implement certain functions. The operation of each MSR is specific for each processor and/or processor family.
Nonmaskable Interrupt (NMI)
An interrupt that the processor reports to the operating system regardless of the processor's current interrupt priority level. An NMI is usually signaled when the platform detects a fatal hardware error condition.
PCI Express Advanced Error Reporting (PCIe AER)
An optional extended capability of PCI Express that provides more robust error reporting than the standard PCI Express error reporting mechanism. For more information about PCIe AER, see the PCI Express Specification.
Platform-Specific Hardware Error Driver (PSHED)
A WHEA component that provides an abstraction of the hardware error reporting facilities of the underlying platform. Microsoft provides PSHEDs for each processor architecture. Platform vendors can supplement the PSHED functionality by implementing PSHED plug-ins that take advantage of platform-specific capabilities.
Service Control Interrupt (SCI)
An interrupt handled by the ACPI driver. Upon receipt of an SCI, the ACPI driver determines which device signaled the interrupt and then responds to the device accordingly.
Service Processor (SP)
A microcontroller, distinct from the main processor(s), which manages platform-specific functions such as monitoring environmental conditions and handling certain error conditions. A service processor is usually a component of the baseboard management controller hardware.