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swapc (sm5 - asm)

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Performs a component-wise conditional swap of the values between two input registers.

swapc dst0[.mask], dst1[.mask], src0[.swizzle], src1[.swizzle], src2[.swizzle]
Item Description
dst0
 [in] Register with arbitrary nonempty write masks. Must be different than dst1.
dst1
 [in] Register with arbitrary nonempty write masks. Must be different than dst0.
src0
 [in] Provides 4 conditions. A nonzero integer value means true.
src1
 [in] One of the values to be swapped.
src2
 [in] One of the values to be swapped.

Remarks

The encoding of this instruction attempts to compactly express multiple parallel conditional swaps of scalars across two 4-component registers, with minor flexibility in the arrangement of the pairs of numbers involved in swapping.

The choice of register and value for src0, src1, and src2 are unconstrained in any way, like movc.

The semantics of this instruction can be described by the equivalent operations with the movc instruction. The worst case is shown in the following example, making sure destination registers are not updated until the end.

                swapc dst0[.mask], 
                      dst1[.mask],
                      src0[.swizzle],
                      src1[.swizzle],
                      src2[.swizzle]

                expands to:

                movc temp[dst0 s mask], 
                     src0[.swizzle], 
                     src2[.swizzle], src1[.swizzle]

                movc dst1[.mask], 
                     src0[.swizzle], 
                     src1[.swizzle], src2[.swizzle]

                mov  dst0.mask, temp

You can choose how to tackle the task, if not directly. For example, the same effect can be achieved by a sequence of up to 4 simple scalar conditional swaps, or as above, two vector movc instructions, plus any overhead to make sure the source values are not clobbered by earlier operations in the midst of the expansion.

Use this instruction for sorting.

This instruction applies to the following shader stages:

Vertex Hull Domain Geometry Pixel Compute
X X X X X X

Minimum Shader Model

This instruction is supported in the following shader models:

Shader Model Supported
Shader Model 5 yes
Shader Model 4.1 no
Shader Model 4 no
Shader Model 3 (DirectX HLSL) no
Shader Model 2 (DirectX HLSL) no
Shader Model 1 (DirectX HLSL) no

Shader Model 5 Assembly (DirectX HLSL)