Platform design for modern standby

To modern connected standby, a PC hardware platform must meet a specific set of requirements. These requirements govern the selection of the SoC chip, DRAM, networking device, and other key hardware components.

Enabling modern standby on a PC platform requires careful planning and engineering. The primary reason for additional engineering is to deliver the low power consumption that the end user expects when the system is in a sleep state and the screen is turned off. Users will not tolerate excessive battery drain, particularly relative to the very good battery life of most smartphones.

The second largest engineering investment for modern standby is to enable low-power communications (Wi-Fi, mobile broadband, and Ethernet). Each communications device includes a significant amount of autonomous processing capability and firmware to allow the platform's SoC or core silicon to power off while maintaining connectivity.

Low-power core silicon (CPU, SoC, DRAM)

The modern standby power state requires frequent transitions between a low-power idle mode and short periods of activity. Through all these transitions, the system is in standby and the screen stays turned off. This model allows the operating system and apps to be always on and running while the hardware delivers low idle power. This combination results in low average power and long battery life during standby.

A modern standby platform with long battery life includes low-power core silicon (or SoC) and DRAM that have the following characteristics:

• The capability to switch between idle and active modes in less than 100 milliseconds. The active mode allows code to run on the CPU(s), but does not necessarily allow accessing the storage device or other host controllers or peripherals. The idle mode can be a clock-gated or power-gated state, but should be the state that has the lowest power consumption for the SoC and DRAM.
• DRAM technology and size to minimize power consumption while in self-refresh mode. Current modern connected standby PCs typically use mobile DRAM (LP-DDR) or low-voltage PC DRAM (PC-DDR3L, PC-DDR3L-RS).
• A power engine plug-in (PEP) that coordinates the low-power state of host controllers on the SoC with SoC-wide power states. The PEP is a small, lightweight driver that abstracts the SoC-specific power dependencies. All modern connected standby platforms must include a PEP that, at minimum, communicates to Windows when the SoC is ready to enter the lowest-power idle mode. For Intel based platforms, the PEP is already present as an inbox driver where SoC specific information is conveyed directly through ACPI FW tables.

Communications and networking devices

The networking device(s) in a modern connected standby-capable platform are responsible for maintaining connectivity to the cloud while the SoC remains in a low-power idle mode. This capability is achieved by offloading basic network maintenance to the networking device.

The network devices in a modern connected standby-capable platform must be capable of protocol offloads. Specifically, the network device must be capable of offloading Address Resolution Protocol (ARP), Name Solicitation (NS), and several other Wi-Fi-specific protocols. To offload protocol processing, the small microcontroller on the networking device responds to network requests while the SoC remains in a low-power idle mode, saving battery power during sleep.

The network devices in a modern connected standby-capable platform must also be capable of detecting important incoming network packets and waking the SoC if necessary. The ability to detect these packets is called wake-on-LAN (WoL) patterns. With WoL patterns, the network device wakes the SoC or core silicon only when an important network packet is detected, which allows the SoC to otherwise remain in a low-power idle mode. The list of important packets to detect is provided to the networking device by Windows and correspond to the system services or apps on the lock screen.

For example, Windows always asks the network adapter to listen for incoming packets from the Windows Notification Service (WNS). Apps that are pinned to the lock screen can also request that the network device listen for app-specific packets for real-time communications, such as Skype.

For more information about protocol offloads, see Protocol Offloads for NDIS Power Management. For more information about WoL patterns, see WOL Patterns for NDIS Power Management.

System designers who build modern connected standby-capable PCs are highly encouraged to build a deep working relationship with their networking hardware vendors.

Platform requirements for modern standby

To support modern standby, a PC platform must meet the technical requirements summarized in the following table.

Topics	Description	Who's responsible?
The system ACPI firmware must set the ACPI_S0_LOW_POWER_IDLE FADT flag.	Indicates that the hardware platform supports the low-power idle mode for modern standby. Note: The FADT bit takes precedence over an S3 object.	System firmware developer (Core silicon or SoC must be capable of low-power idle.)
For non-Intel based platforms, the core silicon or SoC manufacturer must provide a power engine plug-in (PEP).	The PEP coordinates device state and processor idle state dependencies. A minimal PEP is required to communicate to Windows when the device power state dependencies have been achieved for the lowest SoC idle power mode.	Core silicon or SoC provider (Windows 8.1 and later includes the PEP for Intel-based platforms.)
Modern standby PCs supporting Win32 apps must also support Hibernate.	Hibernate is used to save the state of desktop/Win32 applications when critical-low battery capacity is reached.	System firmware developer
For modern standby systems, networking devices that are expected to be able to remain connected must be compatible with NDIS 6.3 (specifically WoL patterns, protocol offloads, and D0 packet coalescing).	Enables the SoC to enter low-power modes while the networking device maintains connectivity.	System designer (OEM/ODM)
Modern standby systems with soldered-in dGPU(s) or support for dGPU plug-in cards must follow Microsoft's guidelines for dGPU support.	Enables the dGPU to enter D3Cold to preserve battery life and to support VRAM self-refresh for faster resume latency.	System firmware developer and system designer (OEM/ODM)
Modern standby systems that support hibernate must implement the ACPI Time and Alarm Device (TAD) with separate AC and DC timers and support for wake on AC reattach.	Enables timers to wake the platform from hibernate depending on the power source (AC or DC) and enables expired AC timers to fire on reattach to AC power.	System firmware developer
Modern standby systems must implement the Battery Trip Point (_BTP) method in ACPI.	Enables the platform to detect changes in battery percentage while in modern standby. This enables features such as adaptive hibernate to work correctly.	System firmware developer
Storage devices in Modern Standby systems should support D3 if possible.	If the platform supports D3, D3 should be enabled for the storage device(s) as described here.	System firmware developer and system designer (OEM/ODM)